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MIPT-ILab / mipt-mips

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
http://mipt-ilab.github.io/mipt-mips/
MIT License
338 stars 138 forks source link

bclri instruction support added. #1509

Closed VasiliyMatr closed 2 years ago

VasiliyMatr commented 2 years ago

This instruction returns rs1 with a single bit cleared at the index specified in shamt. The index is read from the lower log2(XLEN) bits of shamt.

pavelkryukov commented 2 years ago

Please resolve merge conflicts

VasiliyMatr commented 2 years ago

Resolved merge conflicts.

codecov[bot] commented 2 years ago

Codecov Report

Merging #1509 (4e49bea) into main (c2796c3) will increase coverage by 0.00%. The diff coverage is 100.00%.

:exclamation: Current head 4e49bea differs from pull request most recent head 6331f0f. Consider uploading reports for the commit 6331f0f to get more accurate results Impacted file tree graph

@@           Coverage Diff           @@
##             main    #1509   +/-   ##
=======================================
  Coverage   99.81%   99.81%           
=======================================
  Files         139      139           
  Lines       11715    11735   +20     
=======================================
+ Hits        11693    11713   +20     
  Misses         22       22
Impacted Files Coverage Δ
simulator/func_sim/alu.h 100.00% <100.00%> (ø)
simulator/risc_v/riscv_instr.cpp 100.00% <100.00%> (ø)
simulator/risc_v/t/unit_test.cpp 100.00% <100.00%> (ø)

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