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MIPT-ILab / mipt-mips

Cycle-accurate pre-silicon simulator of RISC-V and MIPS CPUs
http://mipt-ilab.github.io/mipt-mips/
MIT License
338 stars 138 forks source link

Remove RISC-V instruction boilerplate #1534

Closed pavelkryukov closed 2 years ago

codecov[bot] commented 2 years ago

Codecov Report

Merging #1534 (de0f46b) into main (e96b39a) will decrease coverage by 0.00%. The diff coverage is 99.42%.

Impacted file tree graph

@@            Coverage Diff             @@
##             main    #1534      +/-   ##
==========================================
- Coverage   99.66%   99.65%   -0.01%     
==========================================
  Files         140      140              
  Lines       11735    11746      +11     
==========================================
+ Hits        11696    11706      +10     
- Misses         39       40       +1
Impacted Files Coverage Δ
simulator/risc_v/riscv_instr.cpp 99.58% <99.30%> (-0.42%) :arrow_down:
simulator/func_sim/alu.h 100.00% <100.00%> (ø)

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