[Pull-Request] [Feature/uart tiny io] - Githubissues

MaistoV / UninaSoC

RISC-V soft-SoC extensible plaftorm for Xilinx FPGAs from University of Naples Federico II.

Apache License 2.0

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[Pull-Request] [Feature/uart tiny io] #14

Closed Granp4sso closed 4 days ago

Granp4sso commented 1 week ago

PR-ready commit:

Integration and validation of physical UART (Xilinx AXI-lite Uart)
Extend BRAM memory to 16KB
Add sw examples: blinky, echo and hello_world
Verify sw exaples on both physical and virtual UART
Remove virtual uart sources
Integration of tinyio library as git submodule
Enable M extension for CORE_PICORV32
Fix bug in script hw/xilinx/synth/tcl/xdma_load_binary.sh