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MaistoV / UninaSoC

RISC-V soft-SoC extensible plaftorm for Xilinx FPGAs from University of Naples Federico II.
Apache License 2.0
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[feature/core_selection] Add core selection to Make flow #20

Open MaistoV opened 1 week ago

MaistoV commented 1 week ago

Add core selection to Make flow for RVM socket CORE_SELECTION parameter