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MaistoV
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UninaSoC
RISC-V soft-SoC extensible plaftorm for Xilinx FPGAs from University of Naples Federico II.
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[feature/ila_flow] Extend flow for ILA probes
#6
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MaistoV
closed
1 month ago
MaistoV
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1 month ago
[ILA][xilinx] Extend flow for ILA probes
[Flow][xilinx] Control ILA instantiation with envvar XILINX_ILA=(0|1)
[xilinx] Add TCL script automatic ILA instantiation (add_ila)
[xilinx] Fix TCL script for marking nets in the post-synthesis netlist (mark_debug_nets)
[xilinx] Add open_ila Makefile target
[xilinx] Add handling of probe file (.ltx)
[Refactoring][xilinx] Minor refactoring on TCL build script for reports
[Doc][xilinx] Update Xilinx doc
[ILA][xilinx] Extend flow for ILA probes