Open PranabNandy opened 7 months ago
MCU ( Cortex M ) = MPU ( Cortex A) + Peripherals which are connected for low latency
This is Old concept.
Now a days everything is SOC ( be it MCU or MPU)
You can run linux on MCU but it does not make sense as it is not build for that
MCU still today by keeping in mind that ISR latency should be minimum
where as in MPU, it is not important factor
HW guys are adding more Instruction (in ISA) in new processor generation which make the system more faster from HW execution side.
Be it BMW engine, be it Merce Dez engine or be it Honda engine....... Main break, streering or gear etc. are same.
Assembler : ( Converts ass code bin code)
ADD R1, R2, R3 ------------------------> 0x8200 FFFF
MCU ( Cortex M ) = MPU ( Cortex A) + Peripherals which are connected for low latency
This is Old concept.
Now a days everything is SOC ( be it MCU or MPU)
You can run linux on MCU but it does not make sense as it is not build for that
MCU still today by keeping in mind that ISR latency should be minimum
where as in MPU, it is not important factor
HW guys are adding more Instruction (in ISA) in new processor generation which make the system more faster from HW execution side.
Be it BMW engine, be it Merce Dez engine or be it Honda engine....... Main break, streering or gear etc. are same.
Assembler : ( Converts ass code bin code)
ADD R1, R2, R3 ------------------------> 0x8200 FFFF