MCU-Driver-Development

TRM: Information about Peripherals, peripheral implementtaiton, register sets, register config, clocks

Datasheet: Information about Pin details, electrical charecteristic

Function Block of STM32F40XX

STM32CubeIDE

Summary:

Boot Up:

For ARM you need to setup the vector table in the reset handler.

You need to locate the vector table at the offset directed by the VTOR register (Vector Table Offset Register)/ VBAR in Arm-A.

When ARM cortex boots up, it expects the first memory pointer by VTOR should be ( SP + reset Handler).

SP will store CPU core's SP and reset vector/handler to its PC.

Reset vector is the address to ISR that the core has to execute.

VTOR has point to a defined location.

We point VTOR to the starting address of Flash Memory (0x0800_0000)

Clock Gating

Clock Enable

Actually we need to go to APH1 peripheral clock to enable the GPIOA

RCC APB1 clock enable register ( by default all values are 0)

we have to enable some peripheral out of it

• So far we have completed the Enabling of GPIOA

GPIO Mode setting

RCC Register Map

Now we know,

• How to flash a device
• How to enable a peripheral
• Set the Mode bit (in/out)
• Put the data on output data register