Discussion with Matthew Arsenault @arsenm, LLVM backend engineer:
Hi Matthew,
My name is Ognjen, and I’m working for AMD (trough external company called Luxoft) on Triton project.
Triton compiler is using LLVM to optimize generated LLVM IR and generate amdgcn.
Currently triton is using legacy pass manager to generate ISA, trough addPassesToEmitFile functionality. However, it seems to me that a lot of the passes are not run this way, even if I use cl options to enable them.
I looked at the amdgpu backend codebase, and it seems that a lot of passes are only available through new pass manager API (such as registerPipelineStartEPCallback for example).
Is that correct? However, it seems to me that new PM can’t be used entirely to emit code. I couldn’t find functionality similar to addPassesToEmitFile for new PM.
If I want to execute all amdgpu backend passes and generate amdgcn assembly, is the right way to do that to use new PM to execute some of the passes that are not available through legacy PM, and then use legacy PM to emit code (with addPassesToEmitFile). This feels weird, and is probably not the case, but I couldn’t figure out how to do it using only one pass manager.
Thanks in advance!
Best Regards,
Ognjen
Response:
You're noticing that the migration to the new pass manager was never truly completed. The core optimizer now uses the new pass manager, but codegen is stuck on the old pass manager. So yes, you need to run two pass managers for a complete end-to-end compile, and this is the case for every target.
We sorely need someone to step up and complete the work to support codegen in new PM. There's an incomplete stack of patches on phabricator (e.g. https://reviews.llvm.org/D64179) that need adoption.
Discussion with Matthew Arsenault @arsenm, LLVM backend engineer:
Hi Matthew,
My name is Ognjen, and I’m working for AMD (trough external company called Luxoft) on Triton project.
Triton compiler is using LLVM to optimize generated LLVM IR and generate amdgcn. Currently triton is using legacy pass manager to generate ISA, trough addPassesToEmitFile functionality. However, it seems to me that a lot of the passes are not run this way, even if I use cl options to enable them. I looked at the amdgpu backend codebase, and it seems that a lot of passes are only available through new pass manager API (such as registerPipelineStartEPCallback for example). Is that correct? However, it seems to me that new PM can’t be used entirely to emit code. I couldn’t find functionality similar to addPassesToEmitFile for new PM. If I want to execute all amdgpu backend passes and generate amdgcn assembly, is the right way to do that to use new PM to execute some of the passes that are not available through legacy PM, and then use legacy PM to emit code (with addPassesToEmitFile). This feels weird, and is probably not the case, but I couldn’t figure out how to do it using only one pass manager.
Thanks in advance!
Best Regards, Ognjen
Response:
You're noticing that the migration to the new pass manager was never truly completed. The core optimizer now uses the new pass manager, but codegen is stuck on the old pass manager. So yes, you need to run two pass managers for a complete end-to-end compile, and this is the case for every target.
We sorely need someone to step up and complete the work to support codegen in new PM. There's an incomplete stack of patches on phabricator (e.g. https://reviews.llvm.org/D64179) that need adoption.
-Matt