16 Bit RCA and CSA

Ryan Lukas

ECE 3700 - Digital System Design - Spring 2019

Verilog

Background

I designed two circuits that implemented a 16 bit ripple carry adder and a carry-select adder and downloaded them onto an FGPA. RCA16 and CSA16 are both seperate files that both require the mux.v, onebitAdder.v and their respective RCA or CSA files.