This repository is a base project to help Spinal users set-up project without knowledge about Scala and SBT.
You can follow the tutorial on the Getting Started page.
More specifically:
Once in the SpinalTemplateSbt
directory, when tools are installed, the commands below can be run to use sbt
.
// To generate the Verilog from the example
sbt "runMain projectname.MyTopLevelVerilog"
// To generate the VHDL from the example
sbt "runMain projectname.MyTopLevelVhdl"
// To run the testbench
sbt "runMain projectname.MyTopLevelSim"
hw/spinal/projectname/MyTopLevel.scala
hw/spinal/projectname/MyTopLevelSim.scala
When you really start working with SpinalHDL, it is recommended (both for comfort and efficiency) to use an IDE, see the Getting started.
You might want to change the project name, which is currently projectname
. To do so (let's say your actual project name is myproject
; it must be all lowercase with no separators):
build.sbt
and/or build.sc
by replacing projectname
by the name of your project myproject
(1 occurrence in each file). The better is to replace in both (it will always work), but in some contexts you can keep only one of these two files:
sbt
, you can replace only in build.sbt
and remove build.sc
mill
, you can replace only in build.sc
and remove build.sbt
hw/spinal/myproject/
(remove the unused hw/spinal/projectname/
folder)package myproject
You can change the project structure as you want. The only restrictions (from Scala environment) are (let's say your actual project name is myproject
):
myproject
folder and files in it must start with package myproject
myproject/somepackage/MyElement.scala
it must start with package myproject.somepackage
.sbt
and mill
must be run right in the folder containing their configurations (recommended to not move these files)Once the project structure is modified, update configurations:
build.sbt
and/or build.sc
(see above) replace / "hw" / "spinal"
by the new path to the folder containing the myproject
folder.projectname/Config.scala
) change the path in targetDirectory = "hw/gen"
to the directory where you want generated files to be written. If you don't use a config or if it doesn't contain this element, generated files will be written in the root directory.Of course you can replace/modify this file to help people with your own project!
The Mill build tool can be installed and used instead of sbt
.
// To generate the Verilog from the example
mill projectname.runMain projectname.MyTopLevelVerilog
// To generate the VHDL from the example
mill projectname.runMain projectname.MyTopLevelVhdl
// To run the testbench
mill projectname.runMain projectname.MyTopLevelSim