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TerosTechnology / vscode-terosHDL

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
https://terostechnology.github.io/terosHDLdoc/
GNU General Public License v3.0
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Prevent Verilog/SystemVerilog macros being tagged with <code> in HTML… #605

Closed gmartina closed 5 months ago

gmartina commented 5 months ago

Bugfix #499 Prevents Verilog/SystemVerilog macros being tagged with <code> in HTML by adding a scape character. Added unit tests.