TerosTechnology / vscode-terosHDL

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!
https://terostechnology.github.io/terosHDLdoc/
GNU General Public License v3.0
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fpga systemverilog verilog vhdl

Current Version Install Count Download Count vscode-TerosHDL documentation

TerosHDL

Check the full documentation: https://terostechnology.github.io

The goal of TerosHDL is to provide an open source toolbox for HDL devlopers with functionalities commonly used by software developers. The toolbox consist in a bunch of tools and on top of them is the VSCode plugin. Some tools are developed by Teros Technology organization and others come from open source proyects. All the tools are organized in different backends and exposed to the GUI with the plugin.

The toolbox tries to be as much self-contained as possible and simplify the installation process. Features:

TerosHDL

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Sponsor

This project was funded through the NGI Assure Fund, a fund established by NLnet with financial support from the European Commission's Next Generation Internet programme, under the aegis of DG Communications Networks, Content and Technology under grant agreement No 957073.