Additional Updates for Documenter for System Verilog

TerosTechnology / vscode-terosHDL

VHDL and Verilog/SV IDE: state machine viewer, linter, documentation, snippets... and more!

https://terostechnology.github.io/terosHDLdoc/

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Additional Updates for Documenter for System Verilog #609

Open joe-belcan opened 2 months ago

joe-belcan commented 2 months ago

added handling of `include keyword to pull in HDL to build documentation.

fixed handling of arguments for Tasks and Functions.

made formatting changes for tasks/functions for readability. should probably be rolled through the instantiations and always blocks in the documentro.

qarlosalberto commented 2 months ago

could you add some tests? https://github.com/TerosTechnology/vscode-terosHDL/tree/dev/packages/colibri/tests/documenter