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Tsai-Cheng-Hong / Verilog-ADPLL

ADPLL 完成階段:Synthesis
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further questions about Virtuoso ultrasim simulation #2

Closed wxknxxzj closed 2 years ago

wxknxxzj commented 2 years ago

English version:： After the previous question practice：模擬的部分需要Virtuoso ultrasim將PFD、Controller、DCO、FREQ_Div匯入即可。

I'm using vcs for the digital part of the simulation, and I'm having trouble with the analog part of the simulation, so I'd like to ask you a few more questions.

  1. Does the TBUFIX4 cell in the dco_model.sp file need to be supported by the corresponding process simulation model? The figure below. 图片

  2. .INCLUDE "ultrasim_cells.sp" .lib "ultrasim_model.122" L18U18V_TT in the pfd_model.sp file. As it is not provided and I have not found the source file, can you provide a suggestion? I have my own process library model, but I don't know how to replace it as I don't understand the structure of both files. 图片

Looking forward to your answer, good luck!

简体中文版： 上一个问题实践后：模擬的部分需要Virtuoso ultrasim將PFD、Controller、DCO、FREQ_Div匯入即可。

数字部分我使用的是vcs进行仿真，模拟部分仿真我遇到了困难，有几个问题想向您继续请教一下。

  1. 在dco_model.sp文件中的 TBUFIX4单元，是不是需要对应的工艺仿真模型支持呢？如下图。

图片

  1. pfd_model.sp 文件中的 .INCLUDE "ultrasim_cells.sp" .lib "ultrasim_model.122" L18U18V_TT 。 由于未提供，我也未找到源文件，能提供一下建议吗？我有自己的工艺库模型，但由于不了解两个文件的结构，不知道如何替换。

图片

期待您的解答，祝好。

Tsai-Cheng-Hong commented 2 years ago
Tsai-Cheng-Hong commented 2 years ago

English version:： After the previous question practice：模擬的部分需要Virtuoso ultrasim將PFD、Controller、DCO、FREQ_Div匯入即可。

I'm using vcs for the digital part of the simulation, and I'm having trouble with the analog part of the simulation, so I'd like to ask you a few more questions.

  1. Does the TBUFIX4 cell in the dco_model.sp file need to be supported by the corresponding process simulation model? The figure below. 图片
  2. .INCLUDE "ultrasim_cells.sp" .lib "ultrasim_model.122" L18U18V_TT in the pfd_model.sp file. As it is not provided and I have not found the source file, can you provide a suggestion? I have my own process library model, but I don't know how to replace it as I don't understand the structure of both files. 图片

Looking forward to your answer, good luck!

简体中文版： 上一个问题实践后：模擬的部分需要Virtuoso ultrasim將PFD、Controller、DCO、FREQ_Div匯入即可。

数字部分我使用的是vcs进行仿真，模拟部分仿真我遇到了困难，有几个问题想向您继续请教一下。

  1. 在dco_model.sp文件中的 TBUFIX4单元，是不是需要对应的工艺仿真模型支持呢？如下图。

图片

  1. pfd_model.sp 文件中的 .INCLUDE "ultrasim_cells.sp" .lib "ultrasim_model.122" L18U18V_TT 。 由于未提供，我也未找到源文件，能提供一下建议吗？我有自己的工艺库模型，但由于不了解两个文件的结构，不知道如何替换。

图片

期待您的解答，祝好。

中文:

  1. TBUFIX4 是從Cell Library裡面呼叫的 我們當時有與公司進行合作，因此直接使用他們的元件 Cell Library我沒有辦法提供，因為當初有簽屬合約保密

如果要把他替換掉的話 TBUFIX4只是一般的Tristate buffer 後面的 X4 代表的是元件的大小 越大的元件推動能力越強 image

  1. "ultrasim_cells.sp" 與 "ultrasim_model.122" L18U18V_TT 是公司提供的元件資料庫 L18U18V_TT表示使用0.18um製程 TT則是製程

SS: 0.9VDD、溫度為125C TT:1.0VDD、溫度25C FF:1.1*VDD、溫度-40C

至於內部的結構，我也不太清楚 因為當時內部資訊都被隱藏了

English:

  1. TBUFIX4 is called from the Cell Library We were working with companies at the time, so we used their components directly I have no way to provide the Cell Library, because it signed a contract to keep it confidential

If you want to replace it, TBUFIX4 is just a general Tristate buffer, and the X4 behind it represents the size of the component The larger the component, the stronger the driving ability

  1. "ultrasim_cells.sp" and "ultrasim_model.122" L18U18V_TT are the component libraries provided by the company L18U18V_TT indicates the use of 0.18um process, TT is the process

SS: 0.9VDD, temperature is 125C TT: 1.0VDD, temperature 25C FF:1.1*VDD, temperature -40C

As for the internal structure, I don't know Because the inside information is hidden

wxknxxzj commented 2 years ago

好的，感谢您的热心解答，对我有很大帮助。