generate_last.v: last_din has no default value

UCLA-VAST / tapa

TAPA is a dataflow HLS framework that features fast compilation, expressive programming model and generates high-frequency FPGA accelerators.

https://tapa.rtfd.io

MIT License

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generate_last.v: last_din has no default value #154

Closed logosAllen closed 3 months ago

logosAllen commented 4 months ago

Dear Authors,

The last_din reg has no default value in this always(*) block. https://github.com/UCLA-VAST/tapa/blob/570f7e3d86eeac9c0b686f806c2264a47673f9bd/backend/python/tapa/assets/verilog/generate_last.v#L26-L57

Thanks.

Blaok commented 3 months ago

Thanks for reporting. last_din is valid only if last_write is 1, so the default value is really "don't care". Sending a75dc3e64343b70c3951156a0fbff583ff1d0b25 to make this explicit.