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UTehran-NavabiLab
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NBGen
A tool to generate mapped netlist and bench for verilog
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adding test design
#7
EBINOIRE
closed
2 weeks ago
0
update package
#6
EBINOIRE
closed
3 months ago
0
Adding vhdl + yosys_script buttons to gui
#5
EBINOIRE
opened
3 months ago
0
Add A "Getting started example" for pypi
#4
EBINOIRE
opened
3 months ago
1
Add support for choosing between custom/default yosys script in GUI
#3
EBINOIRE
opened
5 months ago
0
Unflatten
#2
EBINOIRE
closed
5 months ago
0
add vhdl support, add two examples
#1
EBINOIRE
closed
2 years ago
0