Previous PE layout (PinCell added only at the PE input-output interface):
New PE layout (PinCell added to every FunCell interface i.e for every constat, ALU, IO pin interface is available):
Changelist for the device model:
Naming convention added in the dot file for the additional information about the cell. [For more information please look into riken_8_8.dot given in the scripts directory]
- Due to additional pins the sequence of the elements in the PE is changed to this:
![image](https://github.com/user-attachments/assets/b5e3ac84-71c8-4143-9bc1-50da5e99ffe8)
- Overall, when no pins incorporated, the sequence of the cells inside dot graph file earlier was `LS0 --> LS1 --> PE 1 --> PE 2`
- The sequence of the cells inside dot graph file right now `LS0 (LS0, LS0.pinA) --> LS1 (LS1, LS1.pinA) --> PE 1 --> PE 2`
- LS block has bidirectional pin so that it can handle both the load and store operations.
Previous PE layout (PinCell added only at the PE input-output interface):
New PE layout (PinCell added to every FunCell interface i.e for every constat, ALU, IO pin interface is available):
Changelist for the device model:
LS Cells: LS_0 LS_0.inPinA LS_1 LS_1.inPinA