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VILLASframework
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fpga-hardware
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Reduce size of PCIE BAR0 to 1M to avoid mapping issues when detecting the PCIe device post-bootup
#15
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stv0g
opened
3 years ago
stv0g
commented
3 years ago
In GitLab by @stv0g on Sep 29, 2020, 15:21
In GitLab by @stv0g on Sep 29, 2020, 15:21