XUANTIE-RV wujian100_open issues

XUANTIE-RV / wujian100_open

IC design and development should be faster，simpler and more reliable

MIT License

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issues

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钉钉讨论群二维码过期

#62 smiling-boy-zixi opened 1 year ago
0
Readme information update

#61 zhuanshulz opened 1 year ago
0
关于ip核配置

#60 Jccando opened 1 year ago
0
synthesis failed

#59 Strickland007 opened 1 year ago
1
没有官方的调试器能用jtag调试器替代吗

#58 FDH21 closed 2 years ago
1
发现文档有个地方有错

#57 landwolf opened 2 years ago
0
GPIO cannot clear interrupt

#56 weils2021 opened 2 years ago
1
The ISA name 'xcki' is no longer maintained

#55 AgileC closed 2 years ago
1
請問CDK能支援其他openOCD相容的JTAG嗎？

#54 piondeno closed 2 years ago
6
Core is not modifiable

#53 robtaylor opened 3 years ago
1
钉钉群二维码失效了，可以更新一下吗，有很多问题想问。

#52 sunsetillusion closed 3 years ago
1
几个问题，最后一个问题比较急，谢谢

#51 sunsetillusion closed 2 years ago
1
riscv tool chain download failed, files disappeared , fix it please

#50 280185386 closed 3 years ago
2
为什么我用vivado2019.1综合后时序不对

#49 ztc6 closed 2 years ago
1
平头哥适配过的工具链有开源链接么

#48 hongzhi2015 closed 2 years ago
1
请问钉钉群现在是不能加入了吗

#47 DakenYue closed 3 years ago
1
use riscv64-unknown-elf-objcopy instead of Srec2vmem.py

#46 dpc525 opened 4 years ago
1
Update Makefile

#45 birdshanshan opened 4 years ago
2
request for spec of hardware side

#44 ray-mahong opened 4 years ago
5
开发文档的一些建议

#43 springluo opened 4 years ago
1
fixed as DingDing QR code

#42 sequoiar closed 4 years ago
0
为什么板子和群里的原理图对应不起来啊

#41 ARC-MX opened 4 years ago
2
Do you need bash support? I can contribute.

#40 framsc closed 2 years ago
2
sync_fifo_16x16.fifo_thold VS doc.INTR_CTRL.RX_FIFO_TH

#39 Jinfengyi opened 4 years ago
0
repair gpio init error

#38 HandsomeAssassin closed 4 years ago
0
add the vcs path and license这个许可证是什么，vcs是什么

#37 WangShuoran closed 4 years ago
1
verilog的命名规则、缩写规范

#36 18271646571 opened 4 years ago
0
语法错误

#35 framsc opened 4 years ago
0
编译case异常。

#34 xxxwm closed 2 years ago
9
Update Srec2vmem.py

#33 ghost closed 4 years ago
3
建议支持Yosys

#32 RCoeurjoly opened 4 years ago
2
现在申请开发板试用，能用多长时间？

#31 framsc closed 4 years ago
5
Update README.md

#30 birdshanshan closed 4 years ago
0
Update Makefile

#29 birdshanshan closed 4 years ago
0
Create Srec2vmem.py

#28 birdshanshan closed 4 years ago
1
FPGA实现为什么要用synplify综合，全vivado流程有什么问题吗？

#27 solvery opened 4 years ago
9
About Driver of CK-Linker for WIN10

#26 curliph opened 4 years ago
1
update sdk files

#25 HandsomeAssassin closed 4 years ago
0
请问应用程序如何下载到MCU里面？是通过JTAG接口吗

#24 EECScat closed 4 years ago
3
请问平头哥的FPGA开发板在哪里可以买得到？

#23 EECScat closed 4 years ago
3
fix(iverilog): remove static from tb

#22 xqbumu closed 4 years ago
1
Failed to load program while simulating

#21 EECScat closed 4 years ago
3
请问一下有MCU的基本信息吗

#20 JunnanLi closed 2 years ago
3
Create notepad

#18 muhammadsadewa closed 4 years ago
1
If there is any doc describe the interface

#17 daviesja opened 4 years ago
0
userguide p14，interrupt source description error

#16 cmteric opened 4 years ago
0
Write_bitstream failed！

#15 simux opened 4 years ago
2
"Get started" is better.

#14 jzcruiser closed 4 years ago
1
wechat pic is not working

#13 sequoiar closed 4 years ago
1
哪里能看到设计文档？

#12 solvery opened 4 years ago
1