Xilinx / Vitis-HLS-Introductory-Examples

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RTL blackbox flow #14

Open yluo39github opened 2 years ago

yluo39github commented 2 years ago

Misc/rtl_as_blackbox/ I follow this flow for simulation, and everything is good. However, when I try to move it to HW, I get the following error image image

Can we have an end-to-end example of RTL black-box flow to deploy on HW? Or can anybody tell me how to solve it?