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Xilinx / Vitis_Accel_Examples

Vitis_Accel_Examples
http://xilinx.github.io/Vitis_Accel_Examples/
MIT License
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Warning when build the kernel image #45

Closed lmaxeniro closed 3 years ago

lmaxeniro commented 3 years ago

When I run the tcl script to build the rtl image of this project: https://github.com/Xilinx/Vitis_Accel_Examples/blob/2020.1/rtl_kernels/rtl_vadd_hw_debug/scripts/package_kernel.tcl

These are such warning message : WARNING: [IP_Flow 19-3158] Bus Interface 'm_axi_gmem': FREQ_HZ bus parameter missing from AXI interface when interface is not associated to a clock. WARNING: [IP_Flow 19-3158] Bus Interface 's_axi_control': FREQ_HZ bus parameter missing from AXI interface when interface is not associated to a clock. WARNING: [IP_Flow 19-3157] Bus Interface 'ap_rst_n': Bus parameter POLARITY is ACTIVE_LOW but port 'ap_rst_n' is not *resetn - please double check the POLARITY setting. WARNING: [IP_Flow 19-5661] Bus Interface 'ap_clk' does not have any bus interfaces associated with it. Do these warnings matter and how to remove them?

heeran-xilinx commented 3 years ago

Hi @lmaxeniro , These are expected warning but harmless. Please ignore them. You can find more details here: https://www.xilinx.com/support/answers/71228.html -Heera