Xilinx / Vitis_Accel_Examples

Vitis_Accel_Examples
http://xilinx.github.io/Vitis_Accel_Examples/
MIT License
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acap alveo fpga-programming soc vitis xilinx zynq

Vitis™ Data Center Acceleration Examples

Welcome to the Vitis Data Center Acceleration Examples repository. This repository contains examples to showcase various features of the Vitis™ tools targeting Alveo Data Center platforms. It is expected that users have gone through the Vitis HLS Introductory Examples and Vitis Tutorials and have developed a basic understanding of the tools and the programming model. This repository illustrates specific scenarios related to host code and kernel programming through small working examples. The intention is for users to be able to use these working examples as a reference while developing their own accelerator application based on AMD Alveo platforms.

Brief description of the examples

Example Description
host_xrt XRT Native APIs examples for optimal host-kernel interaction with AMD Devices
performance Examples that cover performance related aspects for kernel-to-memory, host-to-kernel and host-to-memory
rtl_kernels RTL Kernels based examples covering mix of RTL and HLS C++ kernels and hardware debug in Vitis flow
sys_opt Examples covering multiple devices, multiple processes and kernel swap use cases

For more comprehensive documentation,

NOTE

Software Emulation is not supported for the examples and will be deprecated in the tool in 2024.2. This feature will be removed in the subsequent release.

For more details, please visit https://support.xilinx.com/s/article/000036790?language=en_US

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