YosysHQ / nextpnr

nextpnr portable FPGA place and route tool
ISC License
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gowin: Add support for DSP primitives. #1300

Closed yrabbit closed 6 months ago

yrabbit commented 6 months ago

For the following primitives:

packing and processing of fixed wires between macro and between DSP blocks is implemented. Clusters of DSP and macro blocks are processed using custom placement of cluster elements.

yrabbit commented 6 months ago

It may seem that there are a lot of repetitions between the code for individual primitives, but these things are not very easy to use, and although they all work in test examples, I think it’s too early to optimize - it’s easier to quickly correct errors that will come to light during real use.

And I don’t know if this is a peek into the implementation; I needed to dynamically assign several wires to one port. They are not hardwired, another option would be to create many auxiliary networks (many because sometimes up to 18 pairs of wires are connected).

ci->cell_bel_pins.at(id_ACCLOAD).clear();
ci->cell_bel_pins.at(id_ACCLOAD).push_back(id_ALUSEL4);
ci->cell_bel_pins.at(id_ACCLOAD).push_back(id_ALUSEL6);
gatecat commented 6 months ago

This all looks good! And there's nothing wrong with uarches updating cell_bel_pins, it was designed exactly for cases like these.