YosysHQ / nextpnr

nextpnr portable FPGA place and route tool
ISC License
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Gowin. BUGFIX. Create all Clock Pips. #1358

Closed yrabbit closed 2 months ago

yrabbit commented 2 months ago

Some Clocks PIPS were not created due to a check for the presence of a delay class, now all wires are attributed to the class so that there is no longer any need for this check.