Add NVIC.ISER mapping

[kuon]

At present, the ISER register in NVIC is generated as follow:

        pub const ISER = @intToPtr(*volatile Mmio(32, packed struct {
            /// SETENA
            SETENA: u32,
        }), base_address + 0x0);

It would help a lot to parse the <interrupt> elements,

for example, if there is

      <interrupt>
        <name>RTC</name>
        <description>RTC global interrupt</description>
        <value>2</value>
      </interrupt>

there should be something like this:

        pub const ISER = @intToPtr(*volatile Mmio(32, packed struct {
            ..... (2 u1 fields here for padding (well, actually in practice it would be interrupt 0 and 1)...
            /// RTC
            RTC: u1,
        }), base_address + 0x0);

[kuon]

I just tried, with the following svd, and I have no ISER register anywhere in the generated file.

https://github.com/Pve88/stm32l0x1/blob/master/resources/STM32L0x1.svd

[mattnite]

@kuon realized I added a small bug when I introduced IP register generation, it's all fixed now

[kuon]

It's fixed with master and my code is compiling. I still need to check that the code works properly but it seems ok.