Interface Z - an expansion card for the ZX Spectrum which supports
Project status: Currently under development and only suitable for people that want to help out with development and testing.
Current version is ALPHA1.
See FEATURES for more details on the ZX Interface Z features. (click here for PDF document)
Block diagram of Interface Z diagram
The following models are supported:
This section refers to the schematics and printed circuit board design of the Interface Z. The digital design on the FPGA is described in the [FPGA design] section.
Schematics and PCB are released under CC-BY-SA 2.0. This applies to all versions of the schematics and PCBs.
Current hardware version is 2.4. This is a pre-production version, not intented for general public availability.
The FPGA design is written primarly in VHDL, targeting an Altera/Intel Cyclone IV device (EP4CE6E22C8N). There is no flash to store bitfile contents - the FPGA bitfile is loaded by the ESP32 MCU and stored inside the ESP32 flash.
Unless otherwise stated in each HDL or design support file, the FPGA design files are released under BSD 3-Clause License.
This section applies to the firmware running on the ESP32 MCU.
Unless otherwise stated in each source support file, the firmware source files are released under GPL version 3 license.
This section applies to the software intended to run on a separate computer (such as a PC, Mac or other).
Unless otherwise stated in each source support file, the software source files are released under GPL version 3 license.
See DEVELOPING for development information regarding ZX Interface Z (click here for PDF document)
See USER GUIDE for build instructions.