amacgillivray / rv32_core

KU EECS 581 / 582 senior design project. This is project an attempt to study / explore CPU implementations, with an original goal of implementing the RISCV "V" extension. Code currently incomplete.
MIT License
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Find an appropriate FPGA device for the linear algebra accelerator chip #1

Closed amacgillivray closed 1 year ago

amacgillivray commented 2 years ago

At present, the most attractive option is the Zynq-7000 chip.

image

From my current understanding, we could install and run Linux on the processing system (a core onboard the same chip as our programmable logic). This process is described in tutorials such as this one. The processing system could therefore act as our server and run our daemon program to handle requests and manage our (presumably bare-metal) chip.

Another option is Pynq. From what I have read and heard so far, the Pynq Z2 board's python/linux support makes it very easy to access the programmable logic. See Pynq Overlays and Pynq Framework & Image for a breakdown of what Pynq is and how it can simplify some tasks. This seems to be most interesting for those that prefer python to less-abstracted languages like C or C++.

Miscellaneous Links re: FPGA

Links re: linear algebra for ML

amacgillivray commented 1 year ago

Decision: We will use a Zynq board, preferably the Zynq-7000 ZC706 or ZC702. We have chosen this SoC due to the dedicated ARM cores / processing subsystem that we can use for debugging / interfacing with our IP, and because we think that running our daemon program in Linux on the PS would make for an interesting, fully-integrated solution (where all a user needs on their own system is the API headers / library).