| Discipline | COMPUTER SCIENCE |
|---|---|
| Lab | Computer Organization and Architecture Lab |
| Experiment | Implementing 3-8 line Decoder. |
The objective of this Computer Organization and Architecture lab is to design electronic circuits and verify the circuit according to given truth table
Decoder: In digital electronics, a decoder can take the form of a multiple-input, multiple-output logic circuit that converts coded inputs into coded outputs, where the input and output codes are different e.g. n-to-2^n , binary-coded decimal decoders.
Students and Faculty
B. Tech. CS/IT 2nd Year
Dr. APJ Abdul Kalam Technical University, Lucknow
| Name of Developer | Dr. Avdhesh Gupta |
|---|---|
| Institute | IMS Engineering College |
| Email id | avvipersonal@gmail.com |
| Department | Information Technology (IT) |
| Mentored by | Dr. Sangeeta Arora |
|---|---|
| Institute | KIET Group of Insitutions |
| Email id | sangeeta.arora@kiet.edu |
| Department | Computer Applications |
| SrNo | Name | Faculty or Student | Department | Institute | Email id |
|---|---|---|---|---|---|
| 1 | Abhishray Gangwar | Student | Information Technology (IT) | IMS Engineering College | abhigang040101@gmail.com |
| 2 | Chandan Kumar Singh | Student | Information Technology (IT) | IMS Engineering College | krishnanandan10r@gmail.com |
| 3 | Devanshi Srivastava | Student | Information Technology (IT) | IMS Engineering College | dev6sri@gmail.com |