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bespoke-silicon-group
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accelerator-debugger
A framework for building application-level debuggers for bleeding-edge hardware systems.
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Add support for FST files as an input
#18
mara-kr
opened
5 years ago
1
Make signal references more flexible in models
#17
dpetrisko
closed
5 years ago
10
Adding blackparrot model, moving models to models/, minor convenienceā¦
#16
dpetrisko
closed
5 years ago
0
Speed up loading of VCD file
#15
dpetrisko
closed
5 years ago
9
Add "golden RISCV" HW model
#14
dpetrisko
opened
5 years ago
1
Add better docs for manycore_model.py
#13
mara-kr
closed
5 years ago
0
document potentially inaccurate source code listings
#12
mara-kr
closed
5 years ago
0
RF 0-29
#11
mara-kr
closed
5 years ago
0
HWModule -> DebugModule
#10
mara-kr
closed
5 years ago
0
Time should give end simulation time
#9
mara-kr
closed
5 years ago
1
breakpoints for basic modules
#8
mara-kr
closed
5 years ago
0
Bugs!
#7
mara-kr
closed
5 years ago
0
Beautify multi-paneled display
#6
mara-kr
closed
5 years ago
0
`go <time>` command
#5
mara-kr
closed
5 years ago
0
hw_models.py refactor with pylint
#4
mara-kr
closed
5 years ago
0
Speed up breakpoint eval()
#3
mara-kr
closed
5 years ago
0
Breakpoints
#2
mara-kr
closed
5 years ago
0
Multi panel
#1
mara-kr
closed
5 years ago
0