Updates ready handshake naming signals for bsg_fpu

bespoke-silicon-group / basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

http://bjump.org/

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Closed BrendenPage closed 1 year ago

BrendenPage commented 1 year ago

Updates ready handshake naming conventions and its associated usage in the testbenches for bsg_fpu.

Tested with changes from #624