Updated bsg_mem modules and testbenches for depths of 0 and 1 - Githubissues

bespoke-silicon-group / basejump_stl

BaseJump STL: A Standard Template Library for SystemVerilog

http://bjump.org/

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Updated bsg_mem modules and testbenches for depths of 0 and 1 #660

Closed RobertCrist closed 1 year ago

RobertCrist commented 1 year ago

Is used in #659 and #656