bit-hack / riscv-vm

A Small RISC-V Virtual Machine
MIT License
72 stars 14 forks source link
c c-plus-plus isa-emulator risc-v simulator virtual-machine

RISC-V Virtual Machine

This is a RISCV-V Virtual Machine and instruction set emulator implementing a 32 bit RISCV-V processor model. I started this project as a learning exercise to get more familiar with the RISC-V eco system and have increased the scope of the project as it matures. The project itself is still very much in the early stages however.

Features:

There are broadly two elements to this project:

Note: The Binary Translation emulator is currently only available when building for x64 Windows. This is due to the generated code being tailored to that ABI, however in time Linux support for the code generator will follow.

See news for a development log and updates.


Build Status

Build Status Build status


Build requirements


Compiling the project

mkdir build
cd build
cmake ..
make

Executing a basic program

A simple RISC-V program (i.e. main.c) can be compiled and executed as follows:

riscv64-unknown-elf-gcc -march=rv32im -mabi=ilp32 main.c
riscv_vm a.out

Testing

Please note that while the riscv-vm simulator is provided under the MIT license, any of the materials in the tests folder may not be. These tests were taken from a wide range of places to give the project a reasonable test coverage. If you are the author of any of these tests and are unhappy with its inclusion here then please get in touch and I will remove it from the project and its git history.


Notes


Newlib support

There is rudimentary support for target programs that make use of the newlib library. Currently a number of syscalls have been implemented via the ecall instruction. This is just enough to run a number of simpler programs and do some basic file io operations.

Try the following example program:

#include <stdio.h>

int main(int argc, const char **args) {
  printf("Hello World!\n");
  return 0;
}

Spoiler:

Hello World!