Closed cwpearson closed 5 years ago
https://github.com/c3sr/comm_scope/blob/eb289cf4797777fb36036e553eb9c1939427e6a1/src/utils/cache_control.hpp#L17
Something like this probably:
asm volatile ("dcbf 0, %0" : : "r"(p) : "memory");
In 8bb88f21a870516ba653c38086dc8037a0efafac we make this the same as the linux kernel implementation:
https://github.com/torvalds/linux/blob/d7197a5ad8528642cb70f1d27d4d5c7332a2b395/arch/powerpc/include/asm/cache.h#L96
https://github.com/c3sr/comm_scope/blob/eb289cf4797777fb36036e553eb9c1939427e6a1/src/utils/cache_control.hpp#L17
Something like this probably:
asm volatile ("dcbf 0, %0" : : "r"(p) : "memory");