Closed cwpearson closed 5 years ago
https://github.com/c3sr/comm_scope/blob/48e1ce32b3f0f45faa68fda81b551f4f4822feab/src/utils/cache_control.hpp#L61
From the linux kernel https://github.com/torvalds/linux/blob/a978a5b8d83f795e107a2ff759b28643739be70e/tools/arch/x86/include/asm/barrier.h#L24
#elif defined(__x86_64__) #define mb() asm volatile("mfence":::"memory")
fixed in 004d90b00f6c65a7d143b3c87c507235bcc677a7
https://github.com/c3sr/comm_scope/blob/48e1ce32b3f0f45faa68fda81b551f4f4822feab/src/utils/cache_control.hpp#L61
From the linux kernel https://github.com/torvalds/linux/blob/a978a5b8d83f795e107a2ff759b28643739be70e/tools/arch/x86/include/asm/barrier.h#L24