This is a simple CPU architecture that I used to verify that I understand how to use FPGAs, VHDL, and write a CPU using Vivado on Arty S7. This is my largest project to date. Under 1000 Lines of Code.
Create 16 32-bit registers to hold floating point numbers.
Create new instructions for addition, subtraction, multiply, and divide operations.
2.1 Immediate parameters are considered unsigned integers.
2.2 The Floating Point IP will be used.
Create new instructions for loading, storing, and converting to/from integer and floating point.
New operation instructions opcodes as integer add, subtract, multiply, and divide but with the flag set to 1.
Implement Floating Point Math using the Floating Point IP.