Cannot communicate through OpenOCD with Nexys A7

[monniaux]

Hi,

I have a Nexys A7, the successor of the Nexys4DDR (according to the manufacturer, the boards are almost the same).

I installed Vivado 2018.2, took the 1.5 SweRV core, changed the strings asking for a Nexys4DDR into a Nexys-A7-100T and synthesized/implemented the circuit, then downloaded it into the FPGA.

Then I tried connecting through JTAG...

The documentation recommends an Olimex ARM Tiny JTAG cable. I've looked up these cables online but they seem to end with a 20-pin JTAG plug that would not fit anywhere on the board, so I did not order one. I would be very happy if somebody could give the specifics of a cable that works.

The board has an onboard USB-JTAG controller, to which I connected.

adapter driver ftdi
adapter speed 10000

ftdi_device_desc "Digilent USB Device"
ftdi_vid_pid 0x0403 0x6010
ftdi_channel 0
# just TCK TDI TDO TMS, no reset
ftdi_layout_init 0x0088 0x008b
reset_config none

source [find cpld/xilinx-xc7.cfg]
source [find cpld/jtagspi.cfg]

The Xilinx XC7 is detected (openocd scan_chain):

   TapName             Enabled  IdCode     Expected   IrLen IrCap IrMask
-- ------------------- -------- ---------- ---------- ----- ----- ------
 0 xc7.tap                Y     0x00000000 0x*3622093     6 0x01  0x03

But trying to connect to the chip as a Risc-V device fails.

Any advice?

[monniaux]

Am I supposed to use the Olimex JTAG adapter plus a handmade wiring adapter as explained here: https://github.com/chipsalliance/Cores-SweRV_fpga/pull/1/commits/e3c08559efad5925ad86c2bebe4f0a624597dd98

?

[JanMatCodasip]

Hi @monniaux,

yes, you are right.

The demo in this repository is designed so that JTAG interface of the SweRV CPU is exposed on pins of the JD connector on Nexys A7 board.

So correct, you need to use a separate JTAG adapter (for example Olimex ARM-USB-Tiny-H that you already mentioned). Manually inter-connect the 20-pin standard JTAG connector of the Olimex adapter and the JTAG pins on the board (which do not follow any standard layout). You can for example use a bunch of fly-wires for this.

Regards, Jan

[monniaux]

I connected the Olimex ARM-USB-Tiny-H to the JD connector using fly wires: JD 1 to JTAG 13 JD 2 to JTAG 3 JD 3 to JTAG 9 JD 5 to JTAG 4 JD 6 to JTAG 1 JD 7 to JTAG 5 JD 8 to JTAG 7 JD 9 to JTAG 15

When I run openocd as instructed it resets the board, however the chain scan fails !?

[JanMatCodasip]

Hi,

your JTAG wiring appears all right - I do not see any issue with the physical connection.

I'm wondering what SweRV version you use. Do you use 1.4 or 1.5? The demo in this repository is currently intended for 1.4. In case you were using 1.5, that would require wiring an additional reset signal introduced in 1.5 (dbg_rst_l, see here: https://github.com/chipsalliance/Cores-SweRV/issues/44).

Could you share your OpenOCD log? Preferably, run OpenOCD with argument -d3 to increase log verbosity.

Jan

[monniaux]

I'm using 1.5. Should I use 1.4 ?

[JanMatCodasip]

Feel free to use 1.5. In that case, however, you need to adjust the RTL prior to the synthesis. See my previous comment.

[monniaux]

I've tried with 1.4 (for which I had to add a patch due to incorrect syntax). Still cannot communicate.

sudo openocd -d3 -f swerv_openocd.cfg 
Open On-Chip Debugger 0.10.0+dev-01089-g3bfe4926 (2020-02-24-23:19)
Licensed under GNU GPL v2
For bug reports, read
    http://openocd.org/doc/doxygen/bugs.html
User : 13 2 options.c:63 configuration_output_handler(): debug_level: 3
User : 14 2 options.c:63 configuration_output_handler(): 
Debug: 15 2 options.c:187 add_default_dirs(): bindir=/opt/openocd/2020-02-24/bin
Debug: 16 2 options.c:188 add_default_dirs(): pkgdatadir=/opt/openocd/2020-02-24/share/openocd
Debug: 17 2 options.c:189 add_default_dirs(): exepath=/opt/openocd/2020-02-24/bin
Debug: 18 2 options.c:190 add_default_dirs(): bin2data=../share/openocd
Debug: 19 2 configuration.c:42 add_script_search_dir(): adding /home/monniaux/.openocd
Debug: 20 2 configuration.c:42 add_script_search_dir(): adding /opt/openocd/2020-02-24/bin/../share/openocd/site
Debug: 21 2 configuration.c:42 add_script_search_dir(): adding /opt/openocd/2020-02-24/bin/../share/openocd/scripts
Debug: 22 2 configuration.c:97 find_file(): found swerv_openocd.cfg
Debug: 23 2 command.c:143 script_debug(): command - echo echo DEPRECATED! use 'adapter speed' not 'adapter_khz'
User : 25 2 command.c:769 jim_echo(): DEPRECATED! use 'adapter speed' not 'adapter_khz'
Debug: 26 2 command.c:143 script_debug(): command - adapter adapter speed 1500
Debug: 28 2 core.c:1822 jtag_config_khz(): handle jtag khz
Debug: 29 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 30 2 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 31 2 command.c:143 script_debug(): command - echo echo DEPRECATED! use 'adapter driver' not 'interface'
User : 33 2 command.c:769 jim_echo(): DEPRECATED! use 'adapter driver' not 'interface'
Debug: 34 2 command.c:143 script_debug(): command - adapter adapter driver ftdi
Debug: 36 2 command.c:354 register_command_handler(): registering 'ftdi_device_desc'...
Debug: 37 2 command.c:354 register_command_handler(): registering 'ftdi_serial'...
Debug: 38 2 command.c:354 register_command_handler(): registering 'ftdi_channel'...
Debug: 39 2 command.c:354 register_command_handler(): registering 'ftdi_layout_init'...
Debug: 40 2 command.c:354 register_command_handler(): registering 'ftdi_layout_signal'...
Debug: 41 2 command.c:354 register_command_handler(): registering 'ftdi_set_signal'...
Debug: 42 2 command.c:354 register_command_handler(): registering 'ftdi_get_signal'...
Debug: 43 2 command.c:354 register_command_handler(): registering 'ftdi_vid_pid'...
Debug: 44 2 command.c:354 register_command_handler(): registering 'ftdi_tdo_sample_edge'...
Debug: 45 2 command.c:143 script_debug(): command - ftdi_device_desc ftdi_device_desc Olimex OpenOCD JTAG ARM-USB-TINY-H
Debug: 47 2 command.c:143 script_debug(): command - ftdi_vid_pid ftdi_vid_pid 0x15ba 0x002a
Debug: 49 2 command.c:143 script_debug(): command - ftdi_layout_init ftdi_layout_init 0x0808 0x0a1b
Debug: 51 2 command.c:143 script_debug(): command - ftdi_layout_signal ftdi_layout_signal nSRST -oe 0x0200
Debug: 53 2 command.c:143 script_debug(): command - ftdi_layout_signal ftdi_layout_signal LED -data 0x0800
Debug: 55 3 command.c:143 script_debug(): command - transport transport select jtag
Debug: 56 3 command.c:354 register_command_handler(): registering 'jtag_flush_queue_sleep'...
Debug: 57 3 command.c:354 register_command_handler(): registering 'jtag_rclk'...
Debug: 58 3 command.c:354 register_command_handler(): registering 'jtag_ntrst_delay'...
Debug: 59 3 command.c:354 register_command_handler(): registering 'jtag_ntrst_assert_width'...
Debug: 60 3 command.c:354 register_command_handler(): registering 'scan_chain'...
Debug: 61 3 command.c:354 register_command_handler(): registering 'runtest'...
Debug: 62 3 command.c:354 register_command_handler(): registering 'irscan'...
Debug: 63 3 command.c:354 register_command_handler(): registering 'verify_ircapture'...
Debug: 64 3 command.c:354 register_command_handler(): registering 'verify_jtag'...
Debug: 65 3 command.c:354 register_command_handler(): registering 'tms_sequence'...
Debug: 66 3 command.c:354 register_command_handler(): registering 'wait_srst_deassert'...
Debug: 67 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 68 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 69 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 70 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 71 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 72 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 73 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 74 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 75 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 76 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 77 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 78 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 79 3 command.c:354 register_command_handler(): registering 'jtag'...
Debug: 80 3 command.c:354 register_command_handler(): registering 'svf'...
Debug: 81 3 command.c:354 register_command_handler(): registering 'xsvf'...
Debug: 82 3 command.c:143 script_debug(): command - jtag jtag newtap riscv cpu -irlen 5 -expected-id 0x01
Debug: 83 3 tcl.c:567 jim_newtap_cmd(): Creating New Tap, Chip: riscv, Tap: cpu, Dotted: riscv.cpu, 4 params
Debug: 84 3 tcl.c:591 jim_newtap_cmd(): Processing option: -irlen
Debug: 85 3 tcl.c:591 jim_newtap_cmd(): Processing option: -expected-id
Debug: 86 3 core.c:1488 jtag_tap_init(): Created Tap: riscv.cpu @ abs position 0, irlen 5, capture: 0x1 mask: 0x3
Debug: 87 3 command.c:143 script_debug(): command - target target create riscv.cpu riscv -chain-position riscv.cpu
Debug: 88 3 target.c:1961 target_free_all_working_areas_restore(): freeing all working areas
Debug: 89 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 90 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 91 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 92 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 93 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 94 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 95 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 96 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 97 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 98 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 99 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 100 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 101 3 command.c:354 register_command_handler(): registering 'riscv'...
Debug: 102 3 command.c:354 register_command_handler(): registering 'arm'...
Debug: 103 3 command.c:354 register_command_handler(): registering 'arm'...
Debug: 104 3 command.c:354 register_command_handler(): registering 'arm'...
Debug: 105 3 command.c:354 register_command_handler(): registering 'arm'...
Debug: 106 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 107 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 108 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 109 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 110 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 111 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 112 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 113 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 114 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 115 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 116 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 117 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 118 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 119 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 120 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 121 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 122 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 123 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 124 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 125 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 126 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 127 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 128 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 129 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 130 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 131 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 132 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 133 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 134 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 135 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 136 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 137 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 138 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 139 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 140 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 141 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 142 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 143 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 144 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 145 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 146 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 147 3 command.c:354 register_command_handler(): registering 'riscv.cpu'...
Debug: 148 3 command.c:143 script_debug(): command - riscv riscv set_prefer_sba on
Debug: 150 3 command.c:143 script_debug(): command - init init
Debug: 152 3 command.c:143 script_debug(): command - target target init
Debug: 154 3 command.c:143 script_debug(): command - target target names
Debug: 155 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu cget -event gdb-flash-erase-start
Debug: 156 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu configure -event gdb-flash-erase-start reset init
Debug: 157 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu cget -event gdb-flash-write-end
Debug: 158 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu configure -event gdb-flash-write-end reset halt
Debug: 159 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu cget -event gdb-attach
Debug: 160 3 command.c:143 script_debug(): command - riscv.cpu riscv.cpu configure -event gdb-attach halt
Debug: 161 3 target.c:1423 handle_target_init_command(): Initializing targets...
Debug: 162 3 riscv.c:255 riscv_init_target(): riscv_init_target()
Debug: 163 4 semihosting_common.c:97 semihosting_common_init():  
Debug: 164 4 command.c:354 register_command_handler(): registering 'target_request'...
Debug: 165 4 command.c:354 register_command_handler(): registering 'trace'...
Debug: 166 4 command.c:354 register_command_handler(): registering 'trace'...
Debug: 167 4 command.c:354 register_command_handler(): registering 'fast_load_image'...
Debug: 168 4 command.c:354 register_command_handler(): registering 'fast_load'...
Debug: 169 4 command.c:354 register_command_handler(): registering 'profile'...
Debug: 170 4 command.c:354 register_command_handler(): registering 'virt2phys'...
Debug: 171 4 command.c:354 register_command_handler(): registering 'reg'...
Debug: 172 4 command.c:354 register_command_handler(): registering 'poll'...
Debug: 173 4 command.c:354 register_command_handler(): registering 'wait_halt'...
Debug: 174 4 command.c:354 register_command_handler(): registering 'halt'...
Debug: 175 5 command.c:354 register_command_handler(): registering 'resume'...
Debug: 176 5 command.c:354 register_command_handler(): registering 'reset'...
Debug: 177 5 command.c:354 register_command_handler(): registering 'soft_reset_halt'...
Debug: 178 5 command.c:354 register_command_handler(): registering 'step'...
Debug: 179 5 command.c:354 register_command_handler(): registering 'mdd'...
Debug: 180 5 command.c:354 register_command_handler(): registering 'mdw'...
Debug: 181 5 command.c:354 register_command_handler(): registering 'mdh'...
Debug: 182 5 command.c:354 register_command_handler(): registering 'mdb'...
Debug: 183 5 command.c:354 register_command_handler(): registering 'mwd'...
Debug: 184 5 command.c:354 register_command_handler(): registering 'mww'...
Debug: 185 5 command.c:354 register_command_handler(): registering 'mwh'...
Debug: 186 5 command.c:354 register_command_handler(): registering 'mwb'...
Debug: 187 5 command.c:354 register_command_handler(): registering 'bp'...
Debug: 188 5 command.c:354 register_command_handler(): registering 'rbp'...
Debug: 189 5 command.c:354 register_command_handler(): registering 'wp'...
Debug: 190 5 command.c:354 register_command_handler(): registering 'rwp'...
Debug: 191 5 command.c:354 register_command_handler(): registering 'load_image'...
Debug: 192 5 command.c:354 register_command_handler(): registering 'dump_image'...
Debug: 193 5 command.c:354 register_command_handler(): registering 'verify_image_checksum'...
Debug: 194 5 command.c:354 register_command_handler(): registering 'verify_image'...
Debug: 195 5 command.c:354 register_command_handler(): registering 'test_image'...
Debug: 196 5 command.c:354 register_command_handler(): registering 'reset_nag'...
Debug: 197 5 command.c:354 register_command_handler(): registering 'ps'...
Debug: 198 5 command.c:354 register_command_handler(): registering 'test_mem_access'...
Debug: 199 5 ftdi.c:649 ftdi_initialize(): ftdi interface using shortest path jtag state transitions
Debug: 200 66 mpsse.c:425 mpsse_purge(): -
Debug: 201 66 mpsse.c:706 mpsse_loopback_config(): off
Debug: 202 66 mpsse.c:751 mpsse_set_frequency(): target 1500000 Hz
Debug: 203 66 mpsse.c:743 mpsse_rtck_config(): off
Debug: 204 66 mpsse.c:732 mpsse_divide_by_5_config(): off
Debug: 205 66 mpsse.c:712 mpsse_set_divisor(): 19
Debug: 206 66 mpsse.c:775 mpsse_set_frequency(): actually 1500000 Hz
Debug: 207 66 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 208 66 core.c:1789 adapter_khz_to_speed(): have interface set up
Debug: 209 66 mpsse.c:751 mpsse_set_frequency(): target 1500000 Hz
Debug: 210 66 mpsse.c:743 mpsse_rtck_config(): off
Debug: 211 66 mpsse.c:732 mpsse_divide_by_5_config(): off
Debug: 212 66 mpsse.c:712 mpsse_set_divisor(): 19
Debug: 213 66 mpsse.c:775 mpsse_set_frequency(): actually 1500000 Hz
Debug: 214 66 core.c:1785 adapter_khz_to_speed(): convert khz to interface specific speed value
Debug: 215 66 core.c:1789 adapter_khz_to_speed(): have interface set up
Info : 216 66 core.c:1565 adapter_init(): clock speed 1500 kHz
Debug: 217 66 openocd.c:141 handle_init_command(): Debug Adapter init complete
Debug: 218 66 command.c:143 script_debug(): command - transport transport init
Debug: 220 66 transport.c:239 handle_transport_init(): handle_transport_init
Debug: 221 66 core.c:830 jtag_add_reset(): SRST line released
Debug: 222 66 core.c:855 jtag_add_reset(): TRST line released
Debug: 223 66 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 224 67 command.c:143 script_debug(): command - jtag jtag arp_init
Debug: 225 67 core.c:1578 jtag_init_inner(): Init JTAG chain
Debug: 226 67 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Debug: 227 67 core.c:1243 jtag_examine_chain(): DR scan interrogation for IDCODE/BYPASS
Debug: 228 67 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Error: 229 68 core.c:1132 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones
Error: 230 68 core.c:1133 jtag_examine_chain_check(): Check JTAG interface, timings, target power, etc.
Error: 231 68 core.c:1623 jtag_init_inner(): Trying to use configured scan chain anyway...
Debug: 232 68 core.c:1374 jtag_validate_ircapture(): IR capture validation scan
Error: 233 68 core.c:1426 jtag_validate_ircapture(): riscv.cpu: IR capture error; saw 0x1f not 0x01
Debug: 234 68 core.c:327 jtag_call_event_callbacks(): jtag event: TAP reset
Warn : 235 68 core.c:1646 jtag_init_inner(): Bypassing JTAG setup events due to errors
Debug: 236 68 command.c:143 script_debug(): command - dap dap init
Debug: 238 68 arm_dap.c:106 dap_init_all(): Initializing all DAPs ...
Debug: 239 68 openocd.c:158 handle_init_command(): Examining targets...
Debug: 240 68 target.c:1611 target_call_event_callbacks(): target event 17 (examine-start) for core riscv.cpu
Debug: 241 68 riscv.c:792 riscv_examine(): riscv_examine()
Debug: 242 68 riscv.c:227 dtmcontrol_scan(): DTMCONTROL: 0x0 -> 0xffffffff
Debug: 243 68 riscv.c:802 riscv_examine(): dtmcontrol=0xffffffff
Debug: 244 68 riscv.c:804 riscv_examine():   version=0xf
Error: 245 68 riscv.c:247 get_target_type(): Unsupported DTM version: 15
Debug: 246 68 openocd.c:160 handle_init_command(): target examination failed
Debug: 247 68 command.c:143 script_debug(): command - flash flash init
Debug: 249 68 tcl.c:1240 handle_flash_init_command(): Initializing flash devices...
Debug: 250 68 command.c:143 script_debug(): command - nand nand init
Debug: 252 68 tcl.c:498 handle_nand_init_command(): Initializing NAND devices...
Debug: 253 68 command.c:143 script_debug(): command - pld pld init
Debug: 255 68 pld.c:206 handle_pld_init_command(): Initializing PLDs...
Debug: 256 68 gdb_server.c:3492 gdb_target_start(): starting gdb server for riscv.cpu on 3333
Info : 257 68 server.c:311 add_service(): Listening on port 3333 for gdb connections
Debug: 258 68 command.c:143 script_debug(): command - halt halt
Debug: 260 68 target.c:3048 handle_halt_command(): -
Error: 261 68 target.c:569 target_halt(): Target not examined yet
Debug: 262 68 command.c:629 run_command(): Command 'halt' failed with error code -4
User : 263 68 command.c:694 command_run_line(): 
Debug: 264 69 riscv.c:292 riscv_deinit_target(): riscv_deinit_target()
Error: 265 69 riscv.c:247 get_target_type(): Unsupported DTM version: 15
Debug: 266 69 target.c:1961 target_free_all_working_areas_restore(): freeing all working areas

[JanMatCodasip]

The most important message from your OpenOCD log is:

Error: 229 68 core.c:1132 jtag_examine_chain_check(): JTAG scan chain interrogation failed: all ones.

This means that JTAG TDO signal is for some reason read as constant log. 1. I assume your bitstream is properly created per the instruction in README and unmodified (mapping of the JTAG signals to pins is unchanged). So I would recommend double-checking the physical connection between your JTAG adapter and the dev board. Improper physical connection is the most common source of this issue. Verify all your JTAG wires have a reliable contact.

[olofk]

I would recommend using SweRVolf instead https://github.com/chipsalliance/Cores-SweRVolf instead of this repo for a better supported system

[Dueschen]

Hi, I also encountered the same problem with @monniaux which JTAG scan chain reports all ones. I've checked the pin connection for many times but still can't get it right Does anyone know a way to check if the ARM-USB-TINY-H adapter's functionality is all correct? Or is there something I could try for the connection?

Thanks in advance!

[Dueschen]

Hi again, I've solved my own JTAG issue Although I found that my mistake was very very stupid, I still want to share it with the community

I've checked the ARM-USB-TINY-H connector layout and thought that pin 1 is the pin on the up-left corner

But It turns out that the pin name is defined when the connector is facing down (imagine the connector is facing down, connecting to 20 standing male pins) So the actual pin 1 is shown as the following pic

Then my JTAG connection is all right.

Hope it could help although it's such a stupid mistake!

[olofk]

Hi @Dueschen. Good to hear you have it worked out. I still recommend using https://github.com/chipsalliance/Cores-SweRVolf instead of this repository. With SweRVolf you can also debug with OpenOCD using the same USB cable as for UART and don't need to connect an external JTAG cable at all

[Dueschen]

Hi @olofk, thank you for the kind advice. I'll try out later!