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cjg91
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trans-fat
An FPGA Accelerator for Transformer Inference
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#34
jimmy-adams
opened
7 months ago
0
hi，bro，can you give me your email ? I have some question wanna ask you~~ pls
#33
supercooledith
opened
1 year ago
0
where is the layer_kernel in the file named quante_layer.py the 407 row?
#32
supercooledith
opened
1 year ago
0
Why do you use two fpga
#31
lwt55
closed
1 year ago
1
v3
#30
cjg91
closed
2 years ago
0
v3.fpga2 streaming passes test in sw_emu
#29
cjg91
closed
2 years ago
0
Stage2 v2 implemented in SW and passing tests
#28
cjg91
closed
2 years ago
0
Cjg dev
#27
cjg91
closed
2 years ago
0
V1 dev
#26
cjg91
closed
2 years ago
0
Cleaned up host code. Fixed "make test" for all PARTs
#25
cjg91
closed
2 years ago
0
Host all
#24
cjg91
closed
2 years ago
0
FPGA1 HW build
#23
cjg91
closed
2 years ago
0
v1.fpga2 built and passing
#22
danielstumpp
closed
2 years ago
0
fpga v0 build and Makefile Updates
#21
danielstumpp
closed
2 years ago
0
Fpga1 host
#20
cjg91
closed
2 years ago
0
Fpga2 host complete
#19
cjg91
closed
2 years ago
1
Hw dev
#18
cjg91
closed
2 years ago
0
Hw dev
#17
danielstumpp
closed
2 years ago
0
softmax added to stage 2
#16
cjg91
closed
2 years ago
0
stage 2 fused implemented. passes pipeline test
#15
cjg91
closed
2 years ago
0
fixes for the pipeline test
#14
danielstumpp
closed
2 years ago
0
Stage2 unfused implemented
#13
cjg91
closed
2 years ago
0
FPGA1 + FPGA2 SW test
#12
danielstumpp
closed
2 years ago
0
added fpga2 top level
#11
danielstumpp
closed
2 years ago
0
stage4 fused
#10
danielstumpp
closed
2 years ago
0
Stage3 Fused
#9
danielstumpp
closed
2 years ago
0
Host dev
#8
cjg91
closed
2 years ago
0
Host dev
#7
cjg91
closed
2 years ago
1
Linear Fused Kernel for stage1
#6
danielstumpp
closed
2 years ago
0
3.29 Meeting Minutes
#5
cjg91
opened
2 years ago
0
Baseline Performance Measurement
#4
cjg91
opened
2 years ago
0
Quantizing Bert
#3
cjg91
opened
2 years ago
5
P2P Characterization
#2
danielstumpp
closed
2 years ago
8
matmul benchmarking
#1
cjg91
opened
2 years ago
4