This PR rewrites the TrackBuilder to use ordered merges to achieve the required ordering of the outputs. This was first implemented by @aryd for L1L2, and has now been generalized to all seeds. The output in C-simulation is unchanged.
The post-implementation results are below. The timing for most seeds is slightly improved, but it is slightly worse for some seeds (namely L1L2, D3D4, and L2D1). Timing is still met in all cases. The real improvements though are in the resource utilization, where we get 59-67% less LUT utilization and 33-40% less FF utilization.
This PR rewrites the TrackBuilder to use ordered merges to achieve the required ordering of the outputs. This was first implemented by @aryd for L1L2, and has now been generalized to all seeds. The output in C-simulation is unchanged.
The post-implementation results are below. The timing for most seeds is slightly improved, but it is slightly worse for some seeds (namely L1L2, D3D4, and L2D1). Timing is still met in all cases. The real improvements though are in the resource utilization, where we get 59-67% less LUT utilization and 33-40% less FF utilization.
Post-implementation results
Minimum clock period
LUT utilization
FF utilization