Adding/Finishing ECP5 support would be interesting since could provide a FOSS solution (Core + Toolchain) for a SATA controller and would also be directly useful for projects like Linux-on-LiteX-VexRiscv or Linux-on-LiteX-Rocket now that @gsomlo developed a Linux driver.
The steps for this are:
[ ] Making sure LiteICLink bench design on ECP5 works correctly at SATA linerate (1.5Gbps or 3.0Gbps), on the ECPIX-5 or Versa. (IIRC this has already been tested but would be good to re-verify).
[ ] Get OOB initialization sequence working with ECP5 transceiver (Validate generation/detection of TX/RX Idle and then create a proper FSM for the OOB initialization sequence). On Xilinx FPGA, we were relying on some internal logic already present in the transceiver for OOB but this is not present on the ECP5 transceiver, so we have to do it.
[ ] Integrate the ECP5 transceiver wrapper (from LiteICLink) + specific OOB logic as a LiteSATA PHY (with similar interface than the Xilinx PHYs).
[ ] Verify/debug operation on hardware with Litescope probes on OOB, TX/RX datas.
Some initial tests have been done to generate/receive COMRESET/COMINIT/COMWAKE in the ecp5 branch: https://github.com/enjoy-digital/litesata/tree/ecp5 but the integrated electrical idle detection feature of the ECP5 was apparently not fast enough to detect/generate the OOB sequencing correctly. With ECP5 transceiver, it's possible to use the transceiver's IOs as regular IOs driven by user logic; more information for this is available here: https://lab.ktemkin.com/post/serdes-lfps/ We should probably use this for the OOB sequencing.
Adding/Finishing ECP5 support would be interesting since could provide a FOSS solution (Core + Toolchain) for a SATA controller and would also be directly useful for projects like Linux-on-LiteX-VexRiscv or Linux-on-LiteX-Rocket now that @gsomlo developed a Linux driver.
The steps for this are:
The main missing part is probably the OOB initial sequencing: https://www.researchgate.net/publication/295010956/figure/fig2/AS:330628831694855@1455839464365/OOB-Initialization-Sequence.png
Some initial tests have been done to generate/receive COMRESET/COMINIT/COMWAKE in the ecp5 branch: https://github.com/enjoy-digital/litesata/tree/ecp5 but the integrated electrical idle detection feature of the ECP5 was apparently not fast enough to detect/generate the OOB sequencing correctly. With ECP5 transceiver, it's possible to use the transceiver's IOs as regular IOs driven by user logic; more information for this is available here: https://lab.ktemkin.com/post/serdes-lfps/ We should probably use this for the OOB sequencing.