Maximum throughput on the RFIC (without Oversampling) with 12->16 bit packing is 64-bit * 61.44e6 = 3932Mbps.
With the PCie at 64-bit @ 125MHz, we should already have ~8000Mbps in X4 case. We should have enough margin but this could be useful to see if switching to 128-bit bus would be interesting.
If additional DMAs are added to allow internal processing/filtering and stream it over the additional DMA, extra throughput will be welcome.
Will not be required since 122.88MSPS 2T2R is running fine with 64-bit @ 125MHz. Additional processing/filtering modules will use an additional DMA do 64-bit data-width on DMA0 will not be a bottleneck.
Maximum throughput on the RFIC (without Oversampling) with 12->16 bit packing is 64-bit * 61.44e6 = 3932Mbps.
With the PCie at 64-bit @ 125MHz, we should already have ~8000Mbps in X4 case. We should have enough margin but this could be useful to see if switching to 128-bit bus would be interesting.
If additional DMAs are added to allow internal processing/filtering and stream it over the additional DMA, extra throughput will be welcome.