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LiteX based M2 SDR FPGA board.
Copyright (c) 2024 Enjoy-Digital.
[!WARNING]
LiteX-M2SDR is still in the lab, engineering new features. π§ͺ Expect things to change or break, but feel free to contribute! Hardware will be available on the webshop soon.
We know what you'll first ask when discovering this new SDR project: what's the RFIC? π€ Let's answer straight away: Another AD936X-based SDR! π
Why yet another SDR based on this RFIC? Because we've been designing FPGA-based projects for clients with this chip for almost 10 years now and still think this RFIC has incredible capabilities and possibilities that haven't been fully tapped by open-source projects. We believe it can provide a fantastic and simple solution when paired with the LiteX framework we're developing. π
Imagine a minimalist AD9361-based SDR with:
OK, you probably also realized this project is a showcase for LiteX capabilities, haha. π Rest assured, we'll do our best to gather and implement your requests to make this SDR as flexible and versatile as possible!
This board is proudly developed in France π«π· by Enjoy-Digital, managing the project and gateware/software development, and our partner Lambdaconcept designing the hardware. π₯π·
Ideal for SDR enthusiasts, this versatile board fits directly into an M2 slot or can team up with others in a PCIe M2 carrier for more complex projects, including coherent MIMO SDRs. π§
For Ethernet support with 1000BaseX/2500BaseX and SATA connectivity to directly record/play samples to/from an SSD, mount it on the LiteX Acorn Mini Baseboard! π½
Unlock new possibilities in your SDR projects with this cutting-edge boardβwe'll try our best to meet your needs! π
The PCIe design is the first variant developed for the board and does not require an additional baseboard. Just pop the M2SDR into a PCIe M2 slot, connect your antennas, and you're ready to go! π
The SoC has the following architecture:
The PCIe design has already been validated at the maximum AD9361 specified sample rate: 2T2R @ 61.44MSPS (and also seems to correctly handle the oversampling at 2T2R @ 122.88MSPS with 7.9 Gbps of bandwidth on the PCIe bus; this oversampling feature is already in place and more tests/experiments will be done with it in the future).
[!WARNING]
WiP π§ͺ Still in the lab, all the cores required are already developped and interfaces have been validated but the SoC still need to be assembled/tested and software developped.
The Ethernet design variant will gives flexibility when deploying the SDR. The PCIe connector has 4 SerDes transceivers that are in most cases used for... PCIe :) But these are 4 classical GTP transceivers of the Artix7 FPGA that are connected to the PCIe Hardened PHY in the case of a PCIe application but that can be used for any other SerDes-based protocol: Ethernet 1000BaseX/2500BaseX, SATA, etc...
In this design, the PCIe core will then be replaced with LiteEth, providing the 1000BaseX or 2500BaseX PHY but also the UDP/IP hardware stack + Streaming/Etherbone front-end cores.
TODO: Add diagram and more info.
If you are an SDR enthusiast looking to get started with the LiteX-M2SDR board, follow these simple steps to get up and running quickly:
Connect the Board:
Install Required Software:
sudo apt install gnuradio gnuradio-dev soapysdr-tools libsoapysdr0.8 libsoapysdr-dev libgnuradio-soapy3.10.1 gqrx
Clone the Repository:
git clone https://github.com/enjoy-digital/litex_m2sdr
Build and Install Software: Software build use make and cmake for the C kernel driver and utilities, but since we also like Python π , we created a small script on top if it to simplify our developpment and installation:
cd software
./build.py
Load the Kernel Driver:
cd software/kernel
sudo ./init.sh
Run Your SDR Software:
[!WARNING]
WiP π§ͺ Content below is more our memo as developers than anything useful to read π . This will be reworked/integrated differently soon.
For those who want to dive deeper into development with the LiteX-M2SDR board, follow these additional steps after completing the SDR enthusiast steps:
Run Software Tests:
cd software/kernel
make clean all
sudo ./init.sh
cd software/user
make clean all
./m2sdr_util info
./m2sdr_rf init -samplerate=30720000
./tone_gen.py tone_tx.bin
./m2sdr_play tone_tx.bin 100000
SoapySDR Detection/Probe:
SoapySDRUtil --probe="driver=LiteXM2SDR"
Run GNU Radio FM Test:
gnuradio-companion ../gnuradio/test_fm_rx.grc
Enable Debugging in Kernel:
sudo sh -c "echo 'module litepcie +p' > /sys/kernel/debug/dynamic_debug/control"
For those who want to explore the full potential of the LiteX-M2SDR board, including FPGA development, follow these additional steps after completing the software developer steps:
Install LiteX:
Ethernet and PCIe Tests:
./litex_m2sdr.py --with-ethernet --ethernet-sfp=0 --build --load
ping 192.168.1.50
./litex_m2sdr.py --with-pcie --variant=m2 --pcie-lanes=N_LANES --build --load
lspci
Use JTAGBone/PCIeBone:
litex_server --jtag --jtag-config=openocd_xc7_ft2232.cfg # JTAGBone
sudo litex_server --pcie --pcie-bar=04:00.0 # PCIeBone (Adapt bar)
Flash the Board Over PCIe:
cd software
./flash.py ../build/litex_m2sdr_platform/gateware/litex_m2sdr_platform.bin
Reboot or Rescan PCIe Bus:
echo 1 | sudo tee /sys/bus/pci/devices/0000\:0X\:00.0/remove # Replace X with actual value
echo 1 | sudo tee /sys/bus/pci/rescan
E-mail: florent@enjoy-digital.fr