fachat / cbm_ultipet

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Ulti-PET R1.1

Note: this is a part of a larger set of repositories, with upet_family as the main repository.

This is a re-incarnation of the Commodore PET computer(s) from the later 1970s.

It is build on a PCB that fits into a C64-II case (with extra cutouts for connectors), and has only parts that can still be obtained new in 2024. The current version is 1.0A

Picture of a Ulti-PET

Videos on the machine are coming soon on the YouTube 8-bit times channel.

Features

The board is built with a number of features:

Overview

The system architecture is actually rather simple, as you can see in the following graphics.

Ulti-PET System Architecture

The main functionality is "hidden" inside the FPGA. It does:

  1. clock generation and management
  2. memory mapping
  3. video generation.
  4. SPI interface and boot
  5. DAC DMA

On the CPU side of the FPGA it is actually a rather almost normal 65816 computer, with the exception that the bank register (that catches and stores the address lines A16-23 from the CPU's data bus) is in the FPGA, and that there is no ROM. The ROM has been replaced with some code in the FPGA that copies the initial program to the CPU accessible RAM, taking it from the Flash Boot ROM via SPI. This actually simplifies the design, as

  1. parallel ROMs are getting harder to come by and
  2. they are typically not as fast as is needed, and
  3. with the SPI boot they don't occupy valuable CPU address space.

The video generation is done using time-sharing access to the video RAM. The VGA output is 768x576 at 60Hz. So there is a 28ns slot per pixel on the screen, with a pixel clock of 35MHz.

The system runs at 17.5MHz, so a byte of pixel output (i.e. eight pixels) has four memory accesses to VRAM. Two of them are reserved for video access, one for fetching the character data (e.g. at $08xxx in the PET), and the second one to fetch the "character ROM" data, i.e. the pixel data for a character. This is also stored in VRAM, and is being loaded there from the Flash Boot ROM by the initial boot loader.

The FPGA reads the character data, stores it to fetch the character pixel data, and streams that out using its internal video shift register.

For more detailled descriptions of the features and how to use them, pls see the FPGA repository that contains the code for the FPGA, as described in the next section.

I/O included in the Ulti-PET

The Ulti-PET not just has the Ultra-CPU, but also loads of I/O on the one board:

Standard PET IO

The Ulti-PET includes the standard PET I/O features using the VIA and two PIAs, with some extensions. So, it has:

RS232

A Dual UART chip provides two serial interfaces. One interface is a real RS232 with a DB9 connector. The other one is TTL level interface (shared with UEXT, see below).

Fast IEC

An IEC interface is provided using a second VIA chip. Using the VIA shift register, fast mode IEC (like in the C128) is implemented.

Dual SID and sound mixer

Two SID chips are included for your stereo sound pleasure.

The two SID outputs are mixed with the DAC audio output from the Ultra-CPU base. Also, the beeper sound is mixed into the overall sound output.

Two audio amps are included to, so speakers can be directly connected to the board (switched off when the audio jack is used).

Keyboard shift lock and reset

When the shift-lock key in the replacement keyboard is defined on a specific position in the keyboard matrix, the key works like a shift-lock key.

In addition, pressing the shift-lock key longer (a few seconds), resets the machine (as long as the keyboard scanning still works).

CS/A expansion board

The board has a full width CS/A slot for a single expansion card, plus a short CS/A board for the accompanying [CS/A Ultrabus]() Ultra-Bus expansion board. This allows using (compatible) Apple-II, RC2014, and C64 cartridges with the Ulti-PET.

UEXT, and SPI-10 connectors

The board provides three standard I/O ports:

  1. UEXT - this includes serial (see above), I2C, and SPI, all in 3.3V
  2. SPI-10-3.3V - a 3.3V SPI interface for external modules (shared with UEXT)
  3. SPI-10-5V - a 5V SPI interface provided by the second VIA, with selectable clock mode.

For the SPI-10 connectors see here. For the UEXT connector see the Olimex UEXT page

Firmware features

Of the modern I/O, currently these are included and supported in the firmware, i.e. in the BASIC4 models:

Note that if you select the boot option while holding the left shift key, unmodified ROMs are loaded instead.

For more details see the ROM repository, that contains the current version of the firmware and accompanying documentation.

Known Issues

Revision history

1.0a: Initial release

1.1a: Update:

Building

Here are the subdirectories:

Note that a case for the Ulti-PET is in the works - the case modifications for the Micro-PET do not work.

In addition, two other repositories are needed - they are separate as they are shared with other variants of the upet-family:

Board

To have the board built, you can use the gerbers that are stored in the zip file in the Board/production subdirectory.

To populate the board, there is an interactive bom (bill of materials) from KiCad, as well as the KiCad BOM CSV export in the bom folder. Note at this time, part numbers are not available yet, please compare with the Ultra-CPU and PETIO boards.

The BOM contains an Ethernet breakout board that is put into the connectors "above" the USB port. As an alternative you could use the Wifi breakout board. Note that at this time, this is not tested / programmed yet.

FPGA

The FPGA is a Xilinx Spartan 6 programmable logic chip. It runs on 3.3V and it is programmed in VHDL.

To build the FPGA content, clone the FPGA repository, and look for the ShellUPet.bin. This needs to be programmed into the SPI flash chip containing the configration for the FPGA.

ROM

To build the boot ROM image, clone the ROM repository, and build the spiimg70m file. This needs to be programmed into the SPI flash ROM containing the 65816 boot code.

The ROM image can be built using gcc, xa65, and make. Use your favourite EPROM programmer to burn it into the SPI Flash chip.

The ROM contains images of all required ROM images for BASIC 1, 2, and 4, and corresponding editor ROMs, including some that have been extended with wedges.

The updated editor ROMs are from Steve's Editor ROM project and can handle C64 keyboards, has a DOS wedge included, and resets into the Micro-PET boot menu. For more details see the description in the ROM repository.

Case

Currently no custom case is available.

Gallery (R1.0)

The boot menu

Demo of graphics capabilities

Expansion bus

First showing the boot menu during the build process