glk47 / resim-simulating-partial-reconfiguration

Automatically exported from code.google.com/p/resim-simulating-partial-reconfiguration
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/***

ReSim is a reusable library for RTL simulation of Dynamically Reconfigurable Systems (DRS). It uses simulation-only artifacts to mimic the behavior of the FPGA fabric during reconfiguration, and assists designer in detecting bugs BEFORE, DURING and AFTER reconfiguration.

  1. System requirement

    ReSim is implemented using SystemVerilog? and OVM library. It has been tested using QuestaSim?/ModelSim? 6.5g on Windows XP Professional SP2 machine and should work on other platforms. The tool also require Tcl 8.4 (or later) and Python 2.5 (or later).

    The State Migration example requires EDK and has only been tested on EDK 12.4.

  2. Directory structure

    doc ---- Document examples ---- Example DRS designs that uses ReSim scripts ---- Library script code src ---- Library source code

  3. Running examples

    The library includes 3 examples: XDRS, Fast PCIe configuration, and State Migration. The XDRS example further include three versions: XDRS.QUICKSTART XDRS.SINGLE XDRS.MULTIPLE. It is recommended that you run these examples in the following order:

    XDRS.QUICKSTART: 
        This example demonstrates the minimal effort to use ReSim.
    
    XDRS.SINGLE:
        This example demonstrates the advanced concepts of ReSim. The concepts
        include, modifying artifacts for test-specific purposes (e.g. monitor, 
        error injection), using coverage-driven verification on DRS designs. 
    
    XDRS.MULTIPLE 
        This example demonstrates the use of ReSim on designs that have multiple 
        reconfigurable regions.
    
    Fast PCIe configuration:
        This example demonstrates the use of ReSim on a Xilinx reference design.
    
    State Migration: 
        This example demonstrates using ReSim to simulate a processor-based design
        with EDK tools. It also demonstrates designing and simulating a system 
        that aesses module state (FF, memory cells) via the configuration port. 
  4. For in deepth explanation of ReSim library, please refer to the following publications:

    • Lingkan Gong, Oliver Diessel, "Modeling Dynamically Reconfigurable Systems for Simulation-based Functional Verification", Sym. on Field-Prog. Cust. Compt. Machines (FCCM), 2011, pp. 9-16

    • Lingkan Gong, Oliver Diessel, "ReSim: A Reusable Library for RTL Simulation of Dynamic Partial Reconfiguration", IEEE Int. Conf. on Field-Prog. Technology (FPT), 2011, pp. 1-8, BEST PAPER CANDIDATE

    • Lingkan Gong, Oliver Diessel, "Functionally Verifying State Saving and Restoration in Dynamically Reconfigurable Systems", ACM/SIGDA Int. Sym. on Field-Prog. Gate Arrays (FPGA) , 2012, pp. 241-244