kivantium / kivantium-core

A RISC-V based CPU in SystemVerilog

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cpu fpga risc-v systemverilog

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kivantium

The core of kivantium CPU.

Progress

2020/07/23 Restart project.
2020/07/24 RV32I is implemented (except FENCE, ECALL, EBREAK)

LICENSE

This project is licensed under the terms of the MIT license.