search

leafvmaple / vscode-verilog

MIT License
4 stars 5 forks source link

passing option to iverilog #1

Open Johnlon opened 4 years ago

Johnlon commented 4 years ago

I want to be able to pass 'iverilog -Ttyp -Wall -g2012 -gspecify' when running iverilog

How do I for instance turn on system verlilog support without this?

j054n commented 4 years ago

also it would be interesting to invoke command to simulate dumped probes in a testbench, like executing GtkWave (included in Win32 version of IVerilog) with a VCD file generated from vvp stage, and to do possible compile multiple source files, like tesbench, included in the same workspace

Johnlon commented 4 years ago

j054n I just realised I can just edit the plugin on my own file system as the whole thing is just two plain text files. Perhaps you could add this feature with a bit og vsconfig code?

bit-wrangler commented 1 year ago

@leafvmaple This issue would be handled by #11

MohammadKurjieh commented 1 year ago

@bit-wrangler check my fork, it is on VSCode Marketplace, it has this feature as well as other features. https://github.com/MohammadKurjieh/vscode-verilog