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llvm
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circt
Circuit IR Compilers and Tools
https://circt.org
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[Moore] Support unconnected behavior
#7202
cepheus69
closed
1 week ago
3
[firtool] Move SpecializeLayers before LowerLayers
#7201
youngar
closed
1 week ago
0
[FIRRTL][SpecializeLayers] Fix incorrect CF leading to double free
#7200
youngar
closed
1 week ago
0
[FIRRTL][SpecializeLayers] Update doc with proper attribute name
#7199
youngar
closed
1 week ago
0
[FIRRTL][CheckCombLoops] Verify that detection works with region ops
#7198
youngar
closed
1 week ago
0
[CMake] Both local install and compiled release usages failing
#7197
Muxianesty
opened
1 week ago
2
Update clang to 17.
#7196
darthscsi
opened
1 week ago
2
[HW] Move the CombDataFlow op interface from FIRRTL to HW
#7195
prithayan
closed
1 week ago
1
[FIRRTL] Unsafe parallel mutation of IR in SpecializeLayers
#7194
fzi-hielscher
closed
1 week ago
5
[SV][HW] Introduce hw::HWFunctionType and use it for Sim/SV function ops
#7193
uenoku
opened
1 week ago
0
[SimToSV] Fix DPICall lowering to use `replaceOp`
#7192
uenoku
closed
1 week ago
0
[SimToSV] Lowering fails if a DPI call result is consumed by another
#7191
uenoku
closed
1 week ago
0
[Moore][Dedup] Dedup module op
#7190
mingzheTerapines
opened
1 week ago
10
[ExportVerilog] Fix two state type emission of aggregate types
#7189
uenoku
closed
1 week ago
1
[CMake] Installation fails if SLANG_ENABLE_FRONTEND is enabled
#7188
cepheus69
opened
1 week ago
13
Add missing header includes
#7187
rwy7
closed
1 week ago
0
[ESI Runtime] Read ports now invoke callbacks
#7186
teqdruid
closed
4 days ago
2
Fix paths in tests for windows builds
#7185
rwy7
closed
1 week ago
0
[NFCI][OM][SSP][SystemC] Refactor TableGen Pass includes
#7184
fzi-hielscher
closed
1 week ago
1
[NFCI][LLHD][Moore][SV][Verif] Refactor TableGen Pass includes
#7183
fzi-hielscher
closed
1 week ago
0
[NFCI][Calyx] Refactor TableGen Pass includes
#7182
fzi-hielscher
closed
2 weeks ago
0
[NFCI][DC][FSM][Handshake][Pipeline] Refactor TableGen Pass includes
#7181
fzi-hielscher
closed
1 week ago
0
[NFCI][Comb][HW][Seq] Refactor TableGen Pass includes
#7180
fzi-hielscher
closed
1 week ago
0
[NFCI][ESI][Ibis][MSFT] Refactor TableGen Pass includes
#7179
fzi-hielscher
closed
1 week ago
0
[NFCI][FIRRTL] Refactor TableGen Pass includes
#7178
fzi-hielscher
closed
1 week ago
0
[FIRRTL][ExpandWhens] Add StmtExprVisitor to Visitor and Support DPI intrinsic in ExpandWhens
#7177
uenoku
closed
1 week ago
0
[LowerDPI] Refactor the lowering logic to a helper struct, NFC
#7176
uenoku
closed
2 weeks ago
0
[Verif] Add PrepareForFormal pass
#7175
dobios
closed
2 weeks ago
0
[NFCI][Conversion] Refactor TableGen Pass includes
#7174
fzi-hielscher
closed
2 weeks ago
3
[NFCI][Transforms] Refactor TableGen Pass includes
#7173
fzi-hielscher
closed
2 weeks ago
0
[NFC][ExportVerilog] Rename generated `options` member.
#7172
fzi-hielscher
closed
2 weeks ago
1
[CI] ccache doens't work on nightly integration tests
#7171
uenoku
closed
2 weeks ago
6
[LowerDPI] Defer deletion of call ops to prevent inavlid access.
#7170
fzi-hielscher
closed
2 weeks ago
0
[FIRRTL] Dialect/FIRRTL/lower-dpi-error.mlir failed in nightly integration tests
#7169
uenoku
closed
2 weeks ago
1
[ExportVerilog] Avoid using interface pass for PrepareForEmission, NFCI
#7168
uenoku
closed
2 weeks ago
1
Bump llvm
#7167
uenoku
closed
2 weeks ago
0
[FIRRTL] StrictModuleOp
#7166
darthscsi
opened
2 weeks ago
0
[FIRRTL] Instance cycle - diagnose, don't crash
#7165
dtzSiFive
opened
2 weeks ago
0
[Calyx] Passing memories by reference
#7164
jiahanxie353
opened
2 weeks ago
1
[FIRRTL][ExportVerilog] Emit integers on DPI function as two state C-compatible types and clarify ABI
#7163
uenoku
closed
2 weeks ago
0
[MooreToCore] Add conversion support for conditional and yield.
#7162
angelzzzzz
opened
2 weeks ago
6
[Moore] Add the SimplifyProcedures pass.
#7161
hailongSun2000
closed
2 weeks ago
1
[FIRRTL] Add pass to specialize layers
#7160
youngar
closed
2 weeks ago
2
[MooreToCore] Support moore.condintion lower to Core
#7159
mingzheTerapines
closed
2 weeks ago
0
[ImportVerilog] Support readop for memberaccess case
#7158
mingzheTerapines
opened
2 weeks ago
23
[firtool] Remove `LTLToCore` pass from `verification-flavor=immediate` pipeline
#7157
dobios
closed
2 weeks ago
0
[FIRRTL][Metadata] Add the path to the DUT, in the SiFive metadata class.
#7156
prithayan
closed
2 weeks ago
0
[ESI] Ensure esi-cosim.py ends in build/bin folder
#7155
mortbopet
closed
2 days ago
1
[Moore] Add evenOp to handle event controls.
#7154
hailongSun2000
closed
2 weeks ago
0
[ESI][PyCDE] Callback service
#7153
teqdruid
closed
1 week ago
0
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