This PR adds an I2C test to the existing baremetal CHERI test runner. For now, these are simple smoketests that test a few possible connected I2C devices by reading out some information and checking it matches what we expect. The tests are made based on the existing i2c_hat_id demo being used as a non-CHERI check (see i2c_hat_id.c), and have been adapted for CHERI. Please suggest if you have any other ideas for small tests that you think would be appropriate to add here.
There are three tests, which can be configured based on which devices are present:
Read the Raspberry Pi HAT ID EEPROM header and check it.
Read the Raspberry Pi HAT Accelerometer & Gyroscope and Magnetic Sensor WHO_AM_I registers and check these.
Read the config and temperature value from the AS6212 Temperature sensor and check these values are sensible.
The number of test iterations, and the devices that are available, as well as whether to check the contents of the RPi HAT ID EEPROM header, can all be configured via compilation flags.
This has been tested on both FPGA and in Verilator. Currently, it passes on FPGA with the devices connected and fails on Verilator. With #194 applied on top, it passes on Verilator also. This test has also been confirmed to pass 100 iterations for consistency on FPGA.
This PR adds an I2C test to the existing baremetal CHERI test runner. For now, these are simple smoketests that test a few possible connected I2C devices by reading out some information and checking it matches what we expect. The tests are made based on the existing
i2c_hat_id
demo being used as a non-CHERI check (seei2c_hat_id.c
), and have been adapted for CHERI. Please suggest if you have any other ideas for small tests that you think would be appropriate to add here.There are three tests, which can be configured based on which devices are present:
WHO_AM_I
registers and check these.The number of test iterations, and the devices that are available, as well as whether to check the contents of the RPi HAT ID EEPROM header, can all be configured via compilation flags.
This has been tested on both FPGA and in Verilator. Currently, it passes on FPGA with the devices connected and fails on Verilator. With #194 applied on top, it passes on Verilator also. This test has also been confirmed to pass 100 iterations for consistency on FPGA.