Closed AlexJones0 closed 1 month ago
In top_sonata.sv, the clk_i and rst_ni signals were not actually connected to the main system clock and reset signals. This PR hooks them up so that pinmux can actually be used on FPGA.
top_sonata.sv
clk_i
rst_ni
In
top_sonata.sv, theclk_iandrst_nisignals were not actually connected to the main system clock and reset signals. This PR hooks them up so that pinmux can actually be used on FPGA.