This PR adds a simple Pinmux driver, and a check application to go along with it.
More detailed information can be found in commit messages.
The Pinmux driver is a slightly modified version of one that I've already been using to develop applications running on CHERIoT RTOS, with small modifications such that it takes a bounded capability as input rather than using the RTOS MMIO_CAPABILITY macro recommended to be used in the RTOS drivers. For now this driver requires users to read the documentation to see what is muxed where; it might be nice to extend this to enforce compile-time checks in the future but this was proving sufficiently complicated for now, and more emphasis is placed on testing the hardware.
The intent is that the driver exists in sonata-system for usage in check and CI test applications (similar to the USB driver), and so that it can live somewhere while there are potential software-breaking changes to the pinmux RTL that should be tested and fixed before the driver is upstreamed.
The PR also adds a pinmux_check check application, which simply logs some messages to the console UART (UART0), whilst enabling and disabling the output of UART0 to ser0_tx via pinmux, such that some log messages are lost and not seen. A user can then read the messages to confirm that the pinmux appears to be working at some basic level. Testing with this basic check was sufficient to notice the RTL error in #209, for example.
This can be tested by running the pinmux_check application directly and confirming that you get the expected result.
Note that this currently is only confirmed to work on FPGA and not on Verilator, as pinmux is not working in the Verilator simulation environment at the time of writing.
This PR adds a simple Pinmux driver, and a check application to go along with it. More detailed information can be found in commit messages.
The Pinmux driver is a slightly modified version of one that I've already been using to develop applications running on CHERIoT RTOS, with small modifications such that it takes a bounded capability as input rather than using the RTOS
MMIO_CAPABILITYmacro recommended to be used in the RTOS drivers. For now this driver requires users to read the documentation to see what is muxed where; it might be nice to extend this to enforce compile-time checks in the future but this was proving sufficiently complicated for now, and more emphasis is placed on testing the hardware.The intent is that the driver exists in
sonata-systemfor usage in check and CI test applications (similar to the USB driver), and so that it can live somewhere while there are potential software-breaking changes to the pinmux RTL that should be tested and fixed before the driver is upstreamed.The PR also adds a
pinmux_checkcheck application, which simply logs some messages to the console UART (UART0), whilst enabling and disabling the output of UART0 to ser0_tx via pinmux, such that some log messages are lost and not seen. A user can then read the messages to confirm that the pinmux appears to be working at some basic level. Testing with this basic check was sufficient to notice the RTL error in #209, for example.This can be tested by running the
pinmux_checkapplication directly and confirming that you get the expected result. Note that this currently is only confirmed to work on FPGA and not on Verilator, as pinmux is not working in the Verilator simulation environment at the time of writing.