Dual UART - Githubissues

lowRISC / sonata-system

A full micro-controller system utilizing the CHERIoT Ibex core, part of the Sunburst project funded by UKRI

Apache License 2.0

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Closed alees24 closed 4 months ago

alees24 commented 4 months ago

Implement and test a second UART.

RTL changes mimic the first UART.
Second UART is presently unconnected in Verilator sim, but transmission can be viewed.
'Hello world' demo application is modified to emit a sign-on message to both UARTs (verified in sim and on FPGA).
Simple character echo from one UART to the other provides a very basic test of receive functionality on FPGA.

marnovandermaas commented 4 months ago

I think we should hold off on adding a second UART because the RTOS does not have support for it.

HU90m commented 4 months ago

I think we should hold off on adding a second UART because the RTOS does not have support for it.

I'm not sure about support and how easily it can be used in the RTOS, but the demo doesn't need it so I think this is a good call

davidchisnall commented 4 months ago

Adding support in the RTOS is absolutely trivial and would make the compartmentalisation demo nicer.

davidchisnall commented 4 months ago

(The only change needed to the RTOS is to add it to the board description JSON)